兼容6502微处理器IP开发与设计微电子学与固体电子学专业论文.docxVIP

哈尔滨工业大学工学硕士学位论文 哈尔滨工业大学工学硕士学位论文 Abstract Abstract - - PAGE IV- - - III - Abstract Alongside the development of technology of system integration, SoC (System-on-Chip) has merged and promoted the development of IC (Integrated Circuit). As the capacity of integration on chip becomes stronger and the designs become more and more complex, the design method and key technology of SoC greatly promotes the design of IC. Reusable IP (Intellectual Property) provides a shortcut for SoC design, which shortens the design period of products and reduces design cost. The main study of this paper is to design an embedded microprocessor IP core-Orca, which faces intelligent battery system and is compatible with 6502 instruction set. Then the design is verified and synthesized. In this paper, the architecture of Orca embedded microprocessor develops that of 6502 by adding new instructions and expanding addressing mode to meet function needs specified by the project. In the process of the design, the structure is separated into register module, procedure counter, fetch module, decode module, arithmetic logic module, write back module, stack pointers and so on. Then taking 6502 instruction set, new instructions and all addressing mode as specification, the design of whole hardware system is optimized. After optimization, the design meets specification and is simplified. In this paper, a testbench is designed for the verification of Orca microprocessor, using software and hardware co-verification methods. By software, stimuli are generated in higher level and are sent to hardware testbench through interface between software and hardware. Such testbench can more efficiently and targeting verify Orca microprocessor. Meanwhile, they provide a comparison parameter. Verification expectation can be get from test stimulus of software and it can be compared with verification results of hardware tesetbench to efficiently verify the correctness of verification results. Based on feed back results, s