高κ栅介质NdAlO3经时击穿特性研究-微电子学与固体电子学专业论文.docxVIP

摘要 摘要 摘 要 随着半导体工业的发展，晶体管的尺寸不断减小，二氧化硅层的厚度将减至 2nm 以下，仅有几个原子层的厚度。传统的二氧化硅面临诸多严峻挑战，如栅极 泄漏电流增大、击穿电压减小等等。为了满足 CMOS 技术的需要，人们开始采用 高介电常数的介质材料来替代传统的二氧化硅。本文主要研究了新型高 κ 介质 NdAlO3 的 ALD 生长特点及其经时击穿特性。 本文首先详细探讨了 Nd2O3 的 ALD 工艺参数对薄膜质量的影响。通过实验 研究了前驱体温度对薄膜质量的影响，不同脉冲时间和清洗时间与薄膜质量的关 系，淀积温度对薄膜生长速率的影响，ALD 循环周期数与薄膜厚度及生长速率的 关系等等。经过这一系列实验，本文提出了合适的 ALD 工艺条件及各项参数的 具体数值。 另外，研究了退火对 NdAlO3 栅介质材料的影响，结果表明退火之后栅极漏 电流有所减小，随着退火温度升高，漏电流持续减小。重点分析了栅压应力对薄 膜电特性的影响。研究表明，在对 n 型衬底样品施加负压应力后，C-V 曲线向负 电压方向漂移，正电荷注入薄膜。对相同面积相同厚度的样品施加不同应力后， 研究发现，同一应力下栅极漏电流逐渐减小，达到一定程度后突然增大，发生击 穿。随着应力增大漏电流增大，击穿时间缩短。 关键字： 高 κ 材料 原子层淀积 NdAlO3 电特性 经时击穿 Abst Abstract Abstract With the development of the semiconductor industry, the sizes of transistors continue to reduce, the thickness of the SiO2 layer will be reduced to 2 nm or less, only a few atomic layers. Traditional silicon dioxide faced with serious challenges, such as increased gate leakage current, breakdown voltage decreases. In order to meet the needs of the CMOS technology, people began to use a high permittivity dielectric material to replace the traditional SiO2. In this paper it is studied that the growth characteristics and breakdown characteristics of a novel high κ dielectric NdAlO3 by the Atomic Layer Deposition (ALD) . Firstly, the effects of the Nd2O3 ALD process parameters on the quality of the film were discussed in detail. The result showed that the precursor temperature could affect the film quality, the film quality was influenced by different pulse time and purge time. The influence of deposition temperature on the film growth rate was also investigated in detail. The growth rate of the films is different with the number of cycles of ALD. After this series of experiments, suitable ALD process conditions and the specific values of the parameters were presented. In addition, the influence of the annealing on the NdAlO3 gate dielectric material was studied. The results showed that after the annealing gate leakage current is decreased, as the annealing temperature in