计算机组成与结构：chapter14 Instruction Level Parallelism and Superscalar Processors.pptVIP

Computer Organization ArchitectureChapter 14Instruction Level Parallelismand Superscalar Processors What is Superscalar?Superscalar Processor:Such a CPU that can execute multiple instruction pipelines at the same timeFetch multiple instructions at a timeInstruction-level parallelismE.g. : Common instructions (arithmetic, load/store, conditional branch) can be initiated and executed independentlyEqually applicable to RISC CISC 14.1 OverviewWhy Superscalar?Most operations are on scalar quantities (see RISC notes)Improve these operations to get an overall improvement General Superscalar Organization Features of SuperscalarThe essence of superscalar is the ability to execute instructions independently in different pipelinesMultiple functional units, each is implemented as a pipeline Allow instruction to be executed in an order different from the program order What is superpipeline?Many pipeline stages need less than half a clock cycleDouble internal clock speed gets two tasks per external clock cycleIt means that two results are generated in a slotSuperscalar allows parallel fetch and execute multiple instructions Superscalar vSuperpipeline Specifications for Fig14.2Parallelism degree is 2Of course, higher degree superscalar and superpipeline are possibleSuperpineline ‘performance is basically equal to superscalarBoth have two instructions executing at the same timeTwo results/ 1 clock cycleBut, at the start of the program and each branch, the superpipeline falls behind the superscalar LimitationsInstruction level parallelismCompiler based optimisationHardware techniquesLimited byTrue data dependencyProcedural dependencyResource conflictsOutput dependencyAntidependency True Data DependencyADD r1, r2 (r1 := r1+r2;)MOVE r3,r1 (r3 := r1;)Can fetch and decode second instruction in parallel with firstCan NOT execute second instruction until first is finishedAlso called write-read dependency or flow dependency Procedural DependencyCan not execute instructions after a bran