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- 2026-01-30 发布于北京
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ThismaterialexemptperDepartmentofCommercelicenseexceptionTSUCoreGeneratorLab5Introduction
Lab5Intro1IntroductionYouwillcodeupPicoBlazeassemblyinstructionstoimplementaloopbacktesttoechokeyboardstrokestotheserialportonthetargetboardfordisplayonhyperterminal.YouwillcreatetheinstructionROMforPicoBlazeusingtheCoreGeneratorutilityprovidedwithISEFoundation.
Lab5Intro2ObjectivesAftercompletingthismodule,youwillbeableto:ConfigureandgenerateacoreusingtheXilinxCOREGeneratorAddandconnectthecoreinanHDLdesignPerformbehavioralsimulationontheHDLdesign
Lab5Intro3GeneralFlowStep1:GeneratetheROMinitializationfileStep2:GenerateaMemorycoreStep3:InstantiatetheMemorycoreintoanHDLdesignStep4:PerformbehavioralsimulationStep5:Testtheapplicationinhardware
Lab5Intro4SoftwareApplicationInthislab,youwillcodeWritecodeforTASK#3WriteamessagetotheSerialportonthetargetboardWriteamessagetohyperterminalviatheserialportonthetargetboard
Lab5Intro5PicoBlazeHardwarePicoBlazeuart_txenInstructionsAddressInstructionsrx_dataout_port[7:0]port_id[7:0]write_strobeDQen8’h018’h03Interrupt_ackLEDstxinterruptcontrolInterrupt_eventDCMclk55MHzDQenuart_rxrxdata_presentBuffer_full0000000BaudCounten_16_x_baudswitches0000000rstCreatedwithCoreGeneratorGeneratetheinstructionmemoryusingCoreGeneratorandaddtothesystemSystemclock
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