高速FIR数字滤波器的分析与应用-通信与信息系统专业论文.docxVIP

华 中 科 技 大 学 硕 士 学 位 论 文 II Abstract FIR filter is a very important part on the research and application of Digital Signal Processing ,the thesis focus on the parallel structures of high speed FIR filter design for the demand of high speed wireless communication, with schemes analysis and parameter simulation to get specific FPGA design and implementation. Firstly，detailed elaboration of different FIR filter design principle , analysis of their performance and complexity is given. Secondly, to meet the proposal of 800Msps,pulse shape and match filter and channel equalizers are designed respectively .Among them， Pulse shape and match filter is fixed coefficient filter ,the other is variable coefficient filter .Polyphase interpolation filter structure is selected for the design of pulse shape filter; As for match filter, time-domain and frequency-domain parallel structures are taken to compare the parallelism and the FPGA resource consumption. The design makes use of FIR linear phase characteristic and sliding window method to optimize FFT calculation, which could decrease 70% Multiplier units. LMS algorithm, easy for hardware design, is simulated to design the high speed channel equalizer. As the feedback of LMS algorithm, so we take up the program of delayed update of FIR filter coefficients which could improve 4 times of system throughput. Through ISE timing simulation, the result shows the design of pulse shape and match filter, channel equalizer reaches the requirements of high speed wireless communication. The paper has a certain reference value on the design and application of FIR digital filter. Key words: FIR filter；High Speed；Parallel；Pulse Shape；Match Filter；Channel Equalization；FPGA III 目 录 摘 要 I Abstract II 1 绪论 1.1 研究背景 (1) 1.2 研究现状 (2) 1.3 本文研究内容和章节安排 (4) 2 高速 FIR 数字滤波器设计 2.1 基于乘累加结构的 FIR 数字滤波器 (6) 2.2 基于分布式结构的 FIR 数字滤波器 (8) 2.3 基于多相结构的 FIR 数字滤波器 (11) 2.4 基于时域并行结构的 FIR 数字滤波器 (13) 2.5 基于频域并行结构的 FIR 数字滤波器 (16) 2.6 本章小结 (18) 3 高速成形匹配滤波器 3.1 成形匹配滤波