计算机组成与结构：chapter5 Internal Memory.pptVIP

5.1 Semiconductor Memory Organisation Basic element of semi. memory is cell，which stores a digital bit； Cell Properties: Two states：1 or 0 Can be set by write operation（ at least once ） Sensed by read operation Cell writing Reading operation Fig. Ch.5-5.1 RAM (random-access memory): access data by address Misnamed as all semiconductor memory is random access Read/Write: time is the same Volatile: DC supplies Temporary storage Static or dynamic Ch.5-5.1 Dynamic RAM Bits stored as charge in capacitors Charges leak：2ms duration Need refreshing even when powered Simpler construction Smaller per bit Less expensive and low power consumption Need refresh circuits Slower Main memory Essentially analogue Level of charge determines value Ch.5-5.1 Dynamic RAM Structure Ch.5-5.1 DRAM Operation Address line active when bit read or written Transistor switch closed (current flows) Write Voltage to bit line High for 1 low for 0 Then signal address line Transfers charge to capacitor Read Address line selected transistor turns on Charge from capacitor fed via bit line to sense amplifier Compares with reference value to determine 0 or 1 Capacitor charge must be restored Ch.5-5.1 Static RAM Bits stored as flip-flop logic gate No refreshing needed when powered More complex construction Larger per bit: 6 MOS (Metal-oxide semiconductor) More expensive Does not need refresh circuits Faster Cache Digital Uses flip-flops Ch.5-5.1 Stating RAM Structure Ch.5-5.1 Static RAM Operation Transistor arrangement gives stable logic state State 1 C1 high, C2 low T1 T4 off, T2 T3 on State 0 C2 high, C1 low T2 T3 off, T1 T4 on Address line transistors T5 T6 is switch Write – apply value to B compliment to B Read – value is on line B Ch.5-5.1 SRAM v DRAM Both volatile Power needed to preserve data Dynamic cell Simpler to build, smaller More dense Less expensive Needs refresh Larger memory units Static Faster Cache Ch.5-5.1 Read Only Memory (ROM) Permanent storage Read-only, can not be written Data