计算机组成与结构：chapter9 Computer Arithmetic.pptVIP

Computer Organization ArchitectureChapter 9Computer Arithmetic 9.1 Arithmetic Logic UnitDoes the calculationsEverything else in the computer is there to serve this unitController, registers, memory, I/OHandles integers, floating point (real) numbersMay be separate FPU (maths co-processor)May be on chip separate FPU(486DX +) ALU Inputs and Outputs 4.2 Integer RepresentationOnly have 0 1 to represent everythingPositive numbers stored in binarye.g. 41o minus signNo period (.)n-bit binary digits an-1an-2….a1a0 denotes an unsigned integer A Sign-Magnitude RepresentationLeft most bit is sign bit0 means positive1 means negative+18 =-18 =roblemsNeed to consider both sign and magnitude in arithmeticTwo representations of zero (+0 and -0)Rarely used Two’s Complement Representation+3 =2 =1 = 0 =-1 =-2 =-3 =omplement of positive number = unsigned numbercomplement of negative number = bitwise not unsigned number +1 Geometric Depiction of Twos Complement Integers BenefitsOne representation of zeroArithmetic works easily (see later)Negating is fairly easy3 =oolean complement givesdd 1 to LSB Negation Special Case 10 = itwise not dd 1 to +1Result 1verflow is ignored, so:0 = 0 ? Negation Special Case 2-128 = itwise not dd 1 to LSB +1Result o:-(-128) = -128 XMonitor MSB (sign bit)It should change during negation Range of Numbers8 bit 2’s complement+127 == 27 -1-128 = -2716 bit 2s complement+32767 = 011111111= 215 - 1-32768 = 100000000= -215 Conversion Between LengthsPositive number pack with leading zeros+18 = 18 =00010010Negative numbers pack with leading ones-18 = 18 =11101110Extension rul