TSV建模与耗散分析-集成电路工程专业论文.docxVIP

万方数据 万方数据 摘要 摘要 集成电路要继续按照摩尔定律发展，需要寻求新的技术，而三维集成电路和 硅通孔（TSV）技术引起了广泛关注。三维集成电路提供了一种新的提高集成度的 方法，而通孔硅（TSV）技术被认为是三维集成电路中非常关键的互连技术。 本文对三维集成电路中的关键技术 TSV 进行了建模与仿真，并且分析其耗散 特性。具体说来，论文首先建立了 TSV 等效电路可扩展模型，并提取其中各个电 容电感等电学参数的数学表达式；然后根据电路知识简化该等效电路模型，并建 立 TSV 耗散系数数学模型；其次用三维电磁学仿真软件 HFSS 仿真 TSV 三维模型， 并比较采用数学模型和 HFSS 软件仿真两种方法得到的耗散系数结果的差异，以此 验证 TSV 等效电路模型的准确性；再次分析 TSV 模型中各个物理参数和材料属性 对 TSV 耗散系数的影响，以此验证 TSV 等效电路模型的可扩展性；最后分析 TSV 直径与间距比例对其耗散系数、延时和面积利用率的影响，讨论 TSV 直径间距比 例为何值时，由耗散系数、延时和面积利用率三者构成的优化模型达到最优。 HFSS 仿真结果表明，本文建立的 TSV 等效电路模型式准确且可扩展的。在 低频范围（0~2GHz）内，绝缘体电容对 TSV 耗散系数影响占主导地位，使用耗散 系数数学模型的计算结果和 HFSS 软件仿真结果基本一致；高频范围（10~20GHz） 内 TSV 和 bump 电感对 TSV 耗散系数影响占主导地位，模型计算结果与软件仿真 结果有一定误差；中频范围（2~10GHz）内，模型计算结果与软件仿真结果之间误 差介于两者之间。当 TSV 直径间距比例取 1/2 时，由耗散系数、延时和面积利用 率三者构成的优化模型达到最优。 关键词：硅通孔技术 建模 耗散系数 HFSS TSV 建模与耗散分析 Abstract Abstract To continue the progress of Moores law, a new technology is needed, at this time 3D integration and TSV technology is introduced. Three-dimensional IC is a way to improve density of transistors on a chip and TSV is considered as one of key technologies in this process. The paper builds and simulates the model of TSV in the first step, and then analysis its dissipative properties. In detail, the scalable equivalent circuit model of TSV was established first and the mathematical expression of each electrical parameter such as capacitances and inductances was extracted. Then equivalent circuit model was simplified based on the knowledge of the circuit, and the mathematical model of TSV dissipation factor was established. Followed by the TSV model was simulated by the three-dimensional electromagnetic simulation software HFSS, in order to verify the accuracy of the TSV equivalent circuit model. The influence of the physical parameters on the TSV dissipation coefficient was analyzed to verify the scalability of the TSV equivalent circuit model. Finally the influence of TSV diameter and spacing proportional on its dissipation coefficient (or delay, area utilization) was analyze